---+ MGDSQ4 Rev0 Pre-fabrication checks
Schematics & PCB checks
- Top page:
- Temp Sensor
- 5V power: ok
- decoupling: ok
- Sch pinout: ok
- PCB Pins: ok
- PCB location: ok
- DAC
- MSOP package
- Symbol: ok
- PCB pins: ok
- Voltage: 5V ok (3.3-5.5V)
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- DB37
- center to hole and hole-to-hole distance OK
- Standard, cheapo short lead (0.283") connectors (Eg Norcomp 182 series) can use the mounting hole almost centered on the pins. In this case the board needs to be cut.
- The Footprint dimension of a right-angle connector is the distance from the plate to the first row of pins (standard in Digikey is .318", 0.590")
- MGDSQ4 is designed to accomodate a .590" footpring. The edge of the board is then aligned to the faceplate of the DB37. There are two sets of holes.
- 700-series Spectrum control connector is a .590" footprint. Front pins to flange 590 mils OK. Back hole centered on pins OK. Front holes 270 mils from first row of pins,should be 275 mils... CORRECTED
- Norcomp 183 series (590 mil footprint) is compatible. Front pins to flange is 590 mils OK. Spacing between holes should be 325 mils, it is 325.9 on the board. CORRECTED
- Kycon K44 series have the back hole at 630 instead of 640 mils
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- Preamp (LT6200)
- Package: SOIC-8
- Sch pins: ok
- Pin 1 floating: ok
- Power 0 & 5V: OK
- PCB pins:ok, SO8 OK
- Neg feedback: ok. Location: ok for this layer. Bypass cap closest.
- decoupling ok. Well placed.
- Diff amplifier
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-
- Package: SOIC-8
- Sch pins: ok
- Supply voltage: 5V : ok. Polarity OK. Decoupling location: OK
- VOCM has decoupling and can be driven by select resistor. Location ok.
- PCB pins: ok
- Pin 7: floating ok for other diff amp
- Fedback res: location ok but could have been better. but ok. Bypass ok
- Impedance-setting feedback: loc OK
- Output REs: ok
- Output lines: impedanc ematch. ok Layout: ok
- SQUID heater driver
- All on bottom: ok
- Transistor pinout: ok
- Transistor PCB pins: ok
- Location: ok
- Supply: now 5VD only. routing ok
- COntrol voltage: routing ok
- Decoupling: ok
- Ref amplifiers(LT1498)
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- Package: SO8
- Symbol pins: OK
- PCB Pins: ok
- Power 0-5V is ok. Polarity ok. Decouplng ok. location: ok
- R & C locations: ok. filter caps are all local.
- ANALOG_VREF track`: ok. Filter caps at the end next to the pre-amp.
- DAC VREF track:very short. ok.
- The LT1498 can drive up to 10 nf directly. Can we re-confirm that 300-400 nF is ok after the insuctor and the snubber?
- FLUX BIAS DAC
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-
- DAC voltage: OK
- FLUX_BIAS line: has a cap at the end. ok. Would prefer this on internal layer to prevent feedback & oscillations by coupling.
- Note 3: Sees 30k to GND, not 20K. Note 2: Max current is 5V/30K=166 mA, not 200 mA
- layout OK
- Did not check cutoff frequency
- SQUID BIAS
- SQUID boas track: ok. Has cap at end.
- Layout: ok
- Did not check current
- OFFSET
- Layout OK
- OFFSET line: has cap at end
- Current: might need correction to account for voltage drop in lines
- Voltage reference
- Reference: REF43, SO8
- Symbol pins:ok
- PCB pins: ok
- Input Voltage. 5V: ok Decoupling loc ok
- RC components locs: ok
- Power
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-
- Can use single 6.5V rail with resistor
- LT3080, DD-PAK package
- Symbol pins: ok
- PCB pins: ok
- Pin 1 (NC) grounded? Can be anything according to datasheet.
- Should we have a small cap at 5.5VRAW input to prevent high freq noise from getting in
- Power connector: not specified
- Control circuit
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- DS90C032: SO16
- Schematic pins: ok
- Supply: 5V: ok. Decoupling loc ok.
- EN lines: ok
- +/- polarities: ok
- 100ohm termination on all inputs: OK
- Floating unused port:ok, as recommended.
- DS92LV010A: SO8
- Schematic pinout: ok. Decoupling loc:ok
- RE HIGH: ok
- +/- pol: ok
- Driver enable: ok
- Stub from 100 ohm: none. 100 ohm at end.
- component locatoins: ok
- Default: driver not enabled.
- Logic gates
- Assumed SOT23-5 - not in part number
- Function: '07 isopen drain, non-inverting: ok
- Voltage: 5V ok
- Sch pinouut: ok
- PCB pinout: ok
- Polarity of LOAD trigger: ok (when SCK high for TIMEOUT)
- Layout: ok
- Shift Registers
- 595: SOIC 16
- Sch pins: ok
- PCB pins: ok
- G=gnd: ok
- RCK: ok, positive clock
- SER and Q'H: ok
- SCK: positive, ok
- SCLK at HIGH: ok
- Layout ok
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- Routing: selected al groups of signals and checked layout. Routing seems ok.
- MOSI line
- Diff pair ok
- SE line: localized. ok
Carrier lines: ok
- REG SCK goes under all transformers, but in internal layer
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- Test points: OK
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- JFC: Need to carefully check Cryo DB37 pinouts and compatibility with previous board
- JFC:pin positions are OK. COnfirmed with Rev3 Board
- JFC: rechecked that pins assignment are the same as Rev3 board. Assumes pin 1 is the common heater return. SQUID Bias is SQUID_Vout+/-. SQUID signal is on SQUIDOUT
- Mezz DB37
- REG_SCK close to SQUID signal. Can move away?
-
Fixed
To be fixed:
- FIXED JFC: Both DB37 have no Refdes (was not in an obvious place, moved into a more visible location)
- FIXED JFC: Mezz DB37 symbol needs to be fixed for 'bidir' pins.
- FIXED: JFC: DB37 shell GND shorted. Will that cause DRC? No, they are connected on the PCB. Shoudl not be a problem since the conector also shorts them
- FIXED R50 has wrong value. Should be 400 ohms
- CORRECT AS IS: R74: this is a driver. resistor shouldbe in series? (no, the resistor should not be populated when the transciever is opperating as a transmitter - Check that I have the correct default state on the board - by default we have no transmitter and only receivers)
- FIXED: OFFSET/FLUX_BIAS/SQUID_BIAS_Filtered lines: The filter is far from where the signal is used. Add capacitors on the botton near where the signals are used.
- FIXED JFC: Add fiducials
- AJG: Added marking indicating where board edge for shorter connector is JFC: R18 might be in the way if we want to cut the board shorter to use smaller DB37
- FIXED JFC: L11 should be a1:1 inductance ratio
- FIXED JFC: Does the SPI_MISO have a pull-up? Needed for some SPI devices...
- JFC: Should R82 be connected to ANALOG_VREF instea dof GND or is this voluntary? The circuit can`t work with one side of the SQUID grounded.
- MD: yes, good catch on this. R82 should go to ANALOG_VREF and NOT gnd.
- FIXED: LT1498: part number does not show on schematics
- FIXED: R64 should be DNL for the REF43
- FIXED: J4 needs a part number. User a polarized connector
- FIXED: Logic gates U14 U15: package type not in part number. we want SOT23-5
- FIXED: JFC: Maybe the flux_bias line should be internal so we do not create a feedback loop with the pre amp and diff
- FIXED: On the Mezz DB37, the REG_SCK lines are the noisiest but are closest to the CH4 signals. Can we swap with the DEV_CLK lines? Can we have those groundable if we don't want MISO?
To be Fixed
2012-06-19
- LT1498: library name is another op-amp. Circuit ok, but neds to be fixed to prevent future errors
Matt's comments/suggestions on things that need to be addressed:
Bypass caps:
- I'm worried about the small decoupling caps you're using for all the op-amps. For our previous squid controller, all the amps had 10uF 1210 ceramic + 100 nF 0603 ceramic bypass caps. You are using only 100nF + 1nF.
- For the DAC121S101, 100nF + 1nF might be enough, but I notice that in figure 13 of the datasheet, they have 10uF+100nF (elsewhere in the datasheet they have other values). Ofcourse in this special case, the reference opamp needs to be stable with the huge capacitance, so perhaps 100nF is the maximum possible.
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- For the 1st stage amp LT6200 and 2nd stage AD8138, you also have only 100nF+1nF.
- I couldn't find any recommendation for bypass caps in the LT6200 datasheet. We also want to support the opa847, which shows on fig 1 and 2 of its datasheet recommending 6.8 uF (so 10uF ceramic should be good).
- For AD8138 datasheet page 19, the text recommends a bypass cap of 10uF tantalum.
- I haven't yet looked at the LT1498 or the REF43 - you should check these carefully.
- I noticed that the shift registers and transceivers also use only 100n+1n - I think this is ok, but please check these datasheets for their recommendations.
- My conclusion is that for all of the signal chain amps, you should have a 1210 + 0603 bypass cap pad, and should populate them with 10uF ceramic and 100nF. For the other amps (LT1498 and REF43), other components, and the DACs you should check the datasheets and make sure your bypass is adequate.
- the label for pin 1 of the REF43 reference is misleading. It is "NR", which I took to mean "noise reduction bypass cap", but the datasheet lists it as a test pin that should not be connected. I suggest you change the label, but you do not need to change the circuit because C52 is DNL.
Component values for carrier (JF will want to double check this):
- I'm assuming the largest signal coming out of the mezzanine for a single carrier amplitude RMS is 10Vp-p / (2 * sqrt(64 channels)) = 0.625 Vp-p = 0.22V_rms. We would like this to be roughly equal to ~30uV RMS across the detector.
- The manganin wires connecting the squid controller to the bias resistor are about 20 ohms round trip. So if we use:
- R4 = DNL, L2 = 1:1 transformer, R1=R2=R5=R10 = 20 ohms (note that the cable will see 100 ohms on both ends with these choices)
- The cryostat side of the transformer is already referenced through R48, so both R77=R78=DNL.
- then we have 0.22 V_rms/(100ohms mezz output + 4x20ohms squid controller + 20 ohms manganin wires) x 0.030 ohms bias resistor = 33 uV_rms across the detector.
- Johnson noise crosscheck: The carrier signals, from the differential amp to the bias resistor, is 200 ohms (100 ohm on the squid controller, and 100 ohms on the mezz at the output of the diff amp). This creates a current noise of sqrt(4KT/200)=9pA/rtHz into 30 mOhms, which is 0.27 pV/rtHz across the bolometer. This is negligible.
Component values for nuller (JF will want to double check this):
- We want the nuller well matched to the carrier, meaning that we want the current from the nuller to be about the same as the current that goes through the SQUID from the carrier. This depends on the resistance of the bolometer. Let's assume the bolometer is 1 ohm or MORE when its normal, this means we need to be able to provide a current of up to 33 uA_rms from the nuller.
- Starting with a 0.22 V_RMS at the mezz, then if we use:
- R35=100ohms to match the cable, R19=R20=R36=R37=750 ohms, L11=DNL, R79=R80=DNL (not needed).
- then we have 0.22 V_rms x 100 ohms squid controller /(100 ohms mezz + 100 ohms squid controller) / (4x750 ohms) = 37 uA_rms through the squid coil.
- Johnson noise cross check: 750*4 + 100 ohms = 3100 ohms creating a johnson noise current of sqrt(4KT/3100) = 2.3 pA/rtHz
Spectrum Control 700 / Norcomp 183 series/ Kycon k44 series
Suggetions for the DB37 cable (this should probably be put elsewhere:
--
JeanFrancoisCliche - 2012-06-14
This topic: AnalogFMux
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Topic revision: r13 - 2012-07-03 - MattDobbs