The goal of this modification is to keep running all electronics in the system by one specified clock. The Memec Mini Module (MMM) has two crystals (Y1 and Y2 respectively) for FPGA (U1) and Ethernet (U7) chips. The initial idea was to remove both crystals and provide a clock for FPGA(U1) externally and for Ethernet (U7) chip from FPGA. In this way the pin J2-45 (MMM external connector) was reserved for FPGA global clock signal; and pin J2-27 was reserved for the Ethernet (U7) chip. To complete this modification the pin J2-27 should be linked to pin F1 (Ethernet (U7) chip) or pad #4 of the crystal Y2 footprint.

This topic: CryoElectronics > DigitalFMux > MemecMiniModuleModification Topic revision: r3 - 2009-08-25 - GraemeSmecher
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