---+ Broken SPI Trace / FPGA Reflow

Some of the rev3 boards' SPI flashes couldn't be programmed via ISE Impact. This prevents them from loading their bitstreams, i.e. nothing works.

Symptoms

The boards are not successfully programmed by ISE Impact. On one of the affected boards, Impact was unable to identify and recognize the flash at all. On the other board, the flash was correctly recognized but Impact bails before completely programming the device.

Fig. 1 shows the expected SPI signals SCK (top) and MOSI (bottom). This corresponds to the JEDEC ID command (0x9f).

Fig. 1: A correct scope trace, showing SPI clock (top) and MOSI (bottom).

On a broken board, MOSI remains low, suggesting a break somewhere on this trace.

The Culprit

Figure 2 shows the culprit.

Fig. 2: The MOSI trace, routed to the very corner of the FPGA.

MOSI is routed to one of the very corner balls on the Spartan-6 device. Pressing down on this corner of the device allows Impact to identify and use the flash.

Rework

Corner balls on the FPGA needs to be investigated and checked for connectivity.

---

This topic: CryoElectronics > WebHome > SPIFlashProblem Topic revision: r1 - 2011-04-22 - GraemeSmecher

---