---+ McGill Digital Frequency Domain Multiplexed Readout System

Info about this software/firmware/hardware

Contact Matt Dobbs for more information about this project.

Many people contributed to the development of this project. We had a great time building it - mostly because the people involved have been fun to work with. Here's an incomplete list of credits.

  • The Digital fMUX Mezzanine board (ADC/DAC) hardware was designed by M. Dobbs, schematics by M. Dobbs, layout artwork under contract with G. Zizka (paid with Owen Chamberlain research funds) and M. Dobbs.
  • The Digital fMUX FPGA Motherboard was designed by M. Dobbs using the Xilinx ML402 demo board as a model. Schematics by G. Zizka and M. Dobbs.
  • The firmware is designed/written by M. Dobbs. Rajat Mukherjee wrote simulations in IDL to analyse the performance of the DMFS as part of a McGill University undergraduate workstudy program.
  • The embedded processor software is developed and written by M. Dobbs, David Mason, and Rajat Mukherjee. David provided a prototype webserver as part of his UC Berkeley Undergraduate Research Assistant project, and received credit from the EEC department for this work. Rajat tuned the UDP socket data transport up to design speed using David's prototype and wrote simulations for it.
  • special thanks to H.G. Spieler, J. Joseph and T. Lanting
  • This project is supported by the Canadian Foundation for Innovation and by an educational partnership with Xilinx Canada.

Please visit our public webpages at: Winterland Cosmology Lab

Project members can view the internal password protected pages at: Digital FMux Home

This topic: Main > AboutMcGillDfMux Topic revision: r2 - 2007-11-14 - EricBissonnette
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